Identifying fault domains for delta components of a distributed data object

ABSTRACT

The disclosure herein describes placing delta components of a base component in target fault domains. One or more delta components are generated. When a first fault domain that lacks a sibling component of the base component is identified, the first fault domain is selected as a single delta target fault domain and a single delta component is placed on the single delta target fault domain. When a second fault domain that includes a first sibling component of the base component is identified and a third fault domain that includes a second sibling component of the base component is identified, the second fault domain and the third fault domain are selected as a first double delta target fault domain and a second double delta target fault domain, and a first double delta component and a second double delta component are placed on the first and second double delta target fault domains.

BACKGROUND

Distributed data objects can have multiple data components that are placed in different fault domains and/or on different servers. Sometimes, servers need to go into a maintenance mode, such that the components on the servers become unavailable. The data availability and durability of the distributed data object with which the unavailable components are associated is reduced when those components are unavailable. Further, when the servers exit maintenance mode and the components come back online, they may be stale due to missing some input/output traffic while unavailable. Further, some distributed data objects and/or associated systems may be more prone to suffer multiple failures and/or have requirements for multiple levels of redundancy to satisfy.

SUMMARY

This Summary is provided to introduce a selection of concepts in a simplified form that are further described below in the Detailed Description. This Summary is not intended to identify key features or essential features of the claimed subject matter, nor is it intended to be used as an aid in determining the scope of the claimed subject matter. Aspects of the disclosure enhance the data durability of a base component using a delta component at least by generating, by a processor, at least one delta component of the base component, the base component being included in a base fault domain, wherein generating includes: when a first fault domain of a plurality of fault domains that lacks a sibling component of the base component is identified: selecting, by the processor, the first fault domain as a single delta target fault domain for a delta component; and placing, by the processor, a single delta component on the single delta target fault domain; and when a second fault domain that includes a first sibling component of the base component is identified and a third fault domain that includes a second sibling component of the base component is identified: selecting, by the processor, the second fault domain and the third fault domain as a first double delta target fault domain and a second double delta target fault domain for delta components; and placing, by the processor, a first double delta component on the first double delta target fault domain and a second double delta component on the second double delta target fault domain.

BRIEF DESCRIPTION OF THE DRAWINGS

The present description will be better understood from the following detailed description read in light of the accompanying drawings, wherein:

FIG. 1 is a block diagram illustrating a system architecture that is comprised of a set of compute nodes interconnected with each other and a set of storage nodes according to an embodiment;

FIG. 2 is a block diagram illustrating a system configured for generation and management of delta components associated with components of a distributed data object according to an embodiment;

FIG. 3 is a block diagram illustrating a system configured with a redundant array of independent disks (RAID) for use with delta components according to an embodiment;

FIG. 4A is a block diagram illustrating the placement of a single delta component on a fault domain of a system according to an embodiment;

FIG. 4B is a block diagram illustrating the placement of two delta components on two fault domains of a system according to an embodiment;

FIG. 5A is a sequence diagram illustrating a process of generating delta components, decommissioning an associated component, and synchronizing the associated component from one of the delta components according to an embodiment;

5B is a sequence diagram illustrating a process of generating delta components, decommissioning an associated component, and synchronizing the associated component from one of the delta components based on another delta component being unavailable according to an embodiment;

5C is a sequence diagram illustrating a process of generating delta components, decommissioning an associated component, and synchronizing the associated component from two different delta components according to an embodiment;

FIG. 6 is a flowchart illustrating a process of generating delta components associated with a base component, selecting fault domains, and placing the delta components on the selected fault domains according to an embodiment; and

FIG. 7 illustrates a computing apparatus according to an embodiment as a functional block diagram.

Corresponding reference characters indicate corresponding parts throughout the drawings. In FIGS. 1 to 7, the systems are illustrated as schematic drawings. The drawings may not be to scale.

DETAILED DESCRIPTION

Distributed data objects may be configured to store data spread out among multiple hardware devices and physical locations to both secure the data against loss due to hardware failure, software failure, or for other reasons (data durability) and to enable access to the stored data despite periodic downtimes for individual devices (data availability). Providing these features typically includes storing the data redundantly (e.g., storing the same data on multiple devices and/or in multiple locations) within data components of the distributed data object, such that, in the event that one server device fails, the data is still accessible on another server device that stores the data. For instance, data components of a distributed data object may include components configured to store subset of data associated with the distributed data object, such that the total data is stored across multiple components and/or components that mirror each other, such that the data of the distributed data object is stored redundantly on multiple components (e.g., the base components, mirrored components, and delta components described herein). When a component of the distributed data object is going to become unavailable, the data durability and availability will be reduced for the time period during which the component is unavailable and, when the component becomes available again, it may be in a stale state and require synchronization with an up-to-date component.

The described method and system enable the generation and placement of multiple temporary delta components (e.g., two or more delta components for a base component) for use during downtime of conventional data components. The delta components (e.g., shadow components) are configured to temporarily track and mirror data changes that would have been performed in the unavailable component if it were available. Thus, the delta components provide enhanced data redundancy during the downtime of the component. Further, the fault domains are selected for the delta components such that the associated components are stored separately from other mirrored components of the distributed data object, the use of fault domains is conserved, and bandwidth use balancing across occupied fault domains is improved.

Aspects of the disclosure provide a computerized method and system for placing delta components of a base component in target fault domains. At least one delta component associated with a base component is generated. The generation includes selecting a first fault domain as a single target fault domain for a single delta component based on identifying that the first fault domain lacks a sibling component of the base component. Otherwise, the generation includes selecting a second fault domain and a third fault domain as a first double delta target fault domain and a second double delta target fault domain for delta components based on identifying that the second fault domain includes a first sibling component of the base component and that the third fault domain includes a second sibling component of the base component. Based on the single delta target fault domain being selected, a single delta component is placed on the single delta target fault domain. Otherwise, based on the first and second double delta target fault domains being selected, first and second double delta components are placed on the first and second double delta target fault domains, respectively.

The disclosure addresses the challenges, among others, of maintaining data durability and availability during and after downtime of data components of a distributed data object. Aspects of the disclosure provide sufficiently robust and flexible data availability and durability. The described methods and systems operate in an unconventional way by using multiple temporary delta components to track input/output (I/O) traffic and store associated data changes during the downtime of a component. Further, the process of selecting fault domains on which to place delta components further enhances the security of the data being stored. The selection of fault domains for the delta components also enhances efficient bandwidth usage by balancing the I/O bandwidth across multiple fault domains that may otherwise be imbalanced (e.g., witness components have substantially less bandwidth usage than data components). The disclosure further enhances the durability and availability of stored data by providing for multiple delta components for a base component, which enables data to be maintained even in the event of failure of one of the delta components. Further, the synchronization, or resyncing, of the component when it becomes available again is made more efficient when using the delta components as synchronization sources instead of another mirrored component. For instance, less bandwidth and processing resources are required when synchronizing from a delta component because the unwritten sections of the delta component may be filtered out prior to synchronizing, enabling the synchronization process to avoid significant write amplification (e.g., when more data is written to the media than was sent for writing in the I/O writes). The use of multiple delta components further enhances the synchronization process by enabling the base component to be synchronized from more than one of the delta components, such that the synchronization process is protected in the event of failure of one of the delta components (e.g., the synchronization process may track progress when using a first delta component and, if the first delta component fails during the process, the process may then being using a second delta component, picking up from where the process left off with the first delta component). Further, through the use of multiple delta components, in the event of a failure of one of the delta components, other delta components may be used to bring the failed delta component back up-to-date when it becomes available again, further protecting the durability of the data of the base component.

FIG. 1 is a block diagram illustrating a system architecture 100 that is comprised of a set of compute nodes 121-123 interconnected with each other and a set of storage nodes 141-143 according to an embodiment. In other examples, a different number of compute nodes and storage nodes may be used. Each compute node hosts multiple objects, which may be virtual machines (VMs), containers, applications, or any compute entity that can consume storage. When objects are created, they are designated as global or local, and the designation is stored in an attribute. For example, compute node 121 hosts objects 101, 102, and 103; compute node 122 hosts objects 104, 105, and 106; and compute node 123 hosts objects 107 and 108. Some of objects 101-108 are local objects. In some examples, a single compute node may host 50, 100, or a different number of objects. Each object uses a virtual machine disk (VMDK), for example VMDKs 111-118 for each of objects 101-108, respectively. Other implementations using different formats are also possible. A virtualization platform 130, which includes hypervisor functionality at one or more of compute nodes 121, 122, and 123, manages objects 101-108.

In some examples, various components of architecture 100, for example compute nodes 121, 122, and 123, and storage nodes 141, 142, and 143 are implemented using one or more computing apparatuses 718 of FIG. 7.

Virtualization software that provides software-defined storage (SDS), by pooling storage nodes across a cluster, creates a distributed, shared data store, for example a storage area network (SAN). In some distributed arrangements, servers are distinguished as compute nodes (e.g., compute nodes 121, 122, and 123) and storage nodes (e.g., storage nodes 141, 142, and 143). Alternatively, or additionally, some arrangements include servers and/or other nodes that act as both compute nodes and storage nodes. Such an arrangement may be referred to as a hyperconverged infrastructure. Although a storage node may attach a large number of storage devices (e.g., flash, solid state drives (SSDs), non-volatile memory express (NVMe), Persistent Memory (PMEM)) processing power may be limited beyond the ability to handle input/output (I/O) traffic. During data writes to storage devices, a phenomenon termed write amplification may occur, in which more data is written to the physical media than was sent for writing in the I/O. Write amplification is an inefficiency that produces unfavorable I/O delays and may arise as a result of synchronization between mirrored components to bring a stale component up to date, as described herein.

Storage nodes 141-143 each include multiple physical storage components, which may include flash, solid state drives (SSDs), non-volatile memory express (NVMe), persistent memory (PMEM), and quad-level cell (QLC) storage solutions. For example, storage node 141 has storage 151, 152, 152, and 154; storage node 142 has storage 155 and 156; and storage node 143 has storage 157 and 158. In some examples a single storage node may include a different number of physical storage components. In the described examples, storage nodes 141-143 are treated as a SAN with a single global object, enabling any of objects 101-108 to write to and read from any of storage 151-158 using a virtual SAN component 132. Virtual SAN component 132 executes in compute nodes 121-123 and has associated local storages 161-163.

Thin-provisioning may be used, and in some examples, storage nodes 141-143 do not require significantly more processing power than is needed for handling I/O traffic. This arrangement may be less expensive than in an alternative embodiment in which all of storage nodes 141-143 have the same or similar processing capability as compute node 121. Using the disclosure, compute nodes 121-123 are able to operate with a wide range of storage options, including those with minimal processing capability.

In some examples, compute nodes 121-123 each include a manifestation of virtualization platform 130 and virtual SAN component 132. Virtualization platform 130 manages the generating, operations, and clean-up of objects 101 and 102, including the moving of object 101 from compute node 121 to another compute node, to become a moved object. Virtual SAN component 132 permits objects 101 and 102 to write incoming data from object 101 and incoming data from object 102 to storage nodes 141, 142, and/or 143, in part, by virtualizing the physical storage components of the storage nodes.

FIG. 2 is a block diagram illustrating a system 200 configured for generation and management of delta components 214-215 associated with data components (e.g., base component 210 and mirrored components 212) of a distributed data object 206 according to an embodiment. In some examples, the system 200 is implemented on a component or components of a system architecture such as system architecture 100 of FIG. 1. For instance, in some examples, the storage network 202 is implemented as a virtual storage network component or virtual SAN component 132 of FIG. 1 as described above.

The storage network 202 includes an I/O interface 204 and a distributed data object 206 and is configured to receive and/or otherwise interact with I/O traffic 208, including I/O messages or instructions for writing data to the distributed data object 206. In other examples, the storage network 202 may include more and/or differently arranged distributed data objects and/or another data storage object or structure without departing from the description. The I/O interface 204 includes hardware, firmware, and/or software configured for receiving I/O traffic 208 from sources outside the storage network 202 and writing or otherwise sending the associated I/O instructions to the distributed data object 206 of the storage network 202. In many examples, the I/O traffic 208 includes instructions to write data to the storage component or components of the distributed data object 206 for storage therein. Additionally, the I/O interface 204 may be configured for retrieving stored data from the distributed data object 206 and provide such retrieved data to sources outside of the storage network 202. Further, the I/O interface 204 may be configured for facilitating communication of data between multiple distributed data objects or other components within the storage network 202 without departing from the description.

The distributed data object 206 is configured to store data across a plurality of data components (data structures configured to store at least a portion of the total data associated with the distributed data object 206), such as the base component 210, the mirrored components 212, and the delta components 214-215. In some examples, the distributed data object 206 stores data redundantly across multiple components. For instance, multiple copies of a set of data may be stored on each of the base component 210 and the mirrored components 212, such that the data is preserved in the event that one or some of the components fail. The distributed data object 206 may be configured to provide enhanced reliability and availability of the stored data through the redundant storage of data on the multiple components, enabling the data to be accessed despite failure or unavailability of individual components.

It should be understood that, while the base component 210 is illustrated separately from the other mirrored components 212, in other examples, the base component 210 is effectively identical to the other mirrored components 212. Further, the described functionality of the delta components 214-215 herein may also apply to components of the distributed data object 206 other than the base component 210 in other examples. For instance, one or more delta components may be generated and used as described herein with respect to the mirrored component 212 such that the mirrored component 212 operates as a base component as described herein.

In some examples, components (e.g., the base component 210) of the distributed data object 206 are configured to have downtime for maintenance or other reasons (e.g., the base component 210 and/or a host device associated therewith may enter a maintenance mode). Because of the previously described redundancy, the distributed data object 206 is typically capable of continuing to provide access to stored data and to receive additional I/O traffic to write data on the mirrored components 212 that remain active. Further, the distributed data object 206 and/or the associated storage network 202 are configured to enhance the reliability and availability of data storage by creating a delta component 214 or multiple delta components 214-215 when the base component 210 is preparing to become deactivated or otherwise go offline. The delta components 214-215 are configured as temporary components that are configured to log or otherwise track I/O traffic and associated data changes that would be directed to the base component 210 if it were not offline. Further, when the base component 210 becomes reactivated, the delta components 214-215 are configured to synchronize logged or tracked I/O traffic with the reactivated component such that the base component 210 is brought up-to-date with respect to I/O traffic that occurred during the period in which it was inactive. The use of the delta components 214-215 as described provides additional redundancy and reliability of the distributed data object during the downtime of the base component 210.

Further, the number or quantity of created delta components may be one delta component 214, two delta components 214 and 215, or more. The number of created delta components may be determined by the distributed data object 206 or otherwise by the system 200 based on the fault tolerance requirements (e.g., the failure to tolerate (FTT)) of the distributed data object 206 or of the storage network 202 (e.g., a particular distributed data object 206 may require that two, three, or four failures within the object be tolerated without adverse effects on the stored data and, as a result, the number of delta components created may increase with such a requirement). Alternatively, or additionally, the number of delta components 214-215 created in the distributed data object 206 may be based on limitations of the distributed data object 206 or the storage network 202 in general. For instance, if there are a limited number of fault domains upon which delta components may be placed, a limited amount of space upon which delta components may be placed, and/or a limited number of components that may be placed in fault domains, that may result in the number of created delta components being limited (e.g., if there is only one fault domain that can store a delta component based on defined delta component placement rules, then only one delta component 214 may be created with respect to the base component 210 as described herein). Alternatively or in addition, in other examples, additional fault domains are created.

In some examples, when a host device or entity is transitioned into a maintenance mode or fails in some manner, the components of the host become inaccessible and the availability of the data on the associated distributed data object 206 is reduced or weakened, such that the object is able to tolerate fewer fault domain failures (e.g., the FTT value of the data object 206 is reduced). Further, the components become “stale” due to potentially missing out on I/O traffic during the downtime. Stale components (e.g., the base component 210) keep the stale state until they synchronize with an active mirrored component or delta component. If there is no available component for synchronizing, stale objects are never able to restore data availability. For example, if the host of the base component 210 enters a maintenance mode for a period of time and the base component 210 is unavailable during incoming I/O traffic 208, when the base component 210 is reactivated, it is considered “stale”, in that it has not been updated to include the incoming I/O traffic 208 that occurred during the downtime. If at least one of the delta components 214-215 is not generated and operated as described herein and there are no mirrored components 212 that are active and available for synchronizing, the base component 210 and the associated distributed data object 206 will lose data availability forever.

Rather, prior to the base component 210 becoming inactive for maintenance, the delta component(s) 214-215 are generated to track incoming I/O traffic 208 during the downtime and to provide a source for synchronizing when the base component 210 is reactivated. In some examples, the incoming I/O traffic 208 is also written to the mirrored components 212, but the delta components 214-215 provide additional resources for protecting the availability of the data during the downtime by providing “eventual data availability” (e.g., other mirrored components 212 may experience failure or inactivity during the downtime or otherwise prior to the base component 210 synchronizing to come back up-to-date).

The delta components 214-215 are configured to store the latest data of the data blocks affected by the I/O traffic 208 that is not captured by the deactivated base component 210. The base component 210 can then be brought up to date by synchronizing with at least one of the delta components 214-215 before the delta components 214-215 are later deleted or otherwise removed.

In some examples, the delta components 214-215 are not full copies of the base component 210. Instead, the delta components 214-215 are configured to have the address space of the base component 210, but the data locations are unwritten, rather than written with copied data from the base component 210. As a result, the delta components 214-215 do not alone provide full data availability as might be provided by an active mirrored component 212. However, because the delta components 214-215 track incoming I/O during the inactive period of the base component 210, the delta components 214-215 do enable full data availability to be eventually provided by the base component 210 after synchronizing. Thus, the delta components 214-215 provide “eventual data availability”.

A typical reason for a component to be deactivated is a maintenance mode of the associated host device, during which software may be upgraded on the host device. Such a process may cause a component to be inactive for up to an hour, for example. The delta components 214-215 are configured to be capable of tracking all I/O traffic 208 intended for the base component 210 during that time. If all other mirrored components 212 fail or otherwise become inactive during that time, the delta components 214-215 provide additional resources for protecting the availability of the data of the distributed data object 206.

The mirrored components 212 and delta components 214-215 are configured to include tracking bitmaps 216 and tracking bitmaps 218 and 219, respectively. The tracking bitmaps 216, 218, and 219 are used by the associated components to track data blocks that are changed due to incoming I/O traffic 208 during downtime of the base component 210. By tracking which data blocks are changed during the downtime, the base component 210 can be brought up to date by synchronizing only those changed data blocks as indicated in the tracking bitmaps 216, 218, and 219. In some examples, the tracking bitmaps 216, 218, and 219 are configured to include a plurality of data bits with each data bit mapping to an individual data region or block within the address space of the component (e.g., a single bit may map to a 2 MB data region of the address space of the component). The data bits of the tracking bitmap may be initialized to ‘0’ and, upon incoming I/O traffic 208 causing data in a data block to change, the associated component updates the mapped data bit of the data block to be a ‘1’, indicating that that data block will need to be provided to the base component 210 in order to bring it up-to-date, once the base component 210 is available again.

Because delta components, such as delta components 214-215, do not need to have the historical written I/O of the object before creation or generation, they become active directly without going through any synchronization procedure after being created. Delta components have three major states (the persistent state and the memory state of these three are the same). Once created successfully, a delta component will go to an active state. If the delta component is disconnected from the owning distributed data object, it transitions into an absent state. In some examples, a system management program is configured to immediately mark the absent component as a degraded component to mark it for removal by an associated cleanup process. In some examples, it may take more than an hour for the cleanup process to clean up an absent component. However, it is not necessary to leave an inactive delta component or components to wait for such a time window, because once the base component is synchronized, the purpose of the delta component(s) is completed and the component(s) will become stale if/when new I/O traffic is committed to another active mirrored component. To avoid letting a degraded delta component (e.g., delta component 214) wait for removal and occupy system resources while waiting, the degraded delta component may be deleted quickly by moving it to the degraded state and notifying the cleanup process to delete it as soon as possible. In alternative examples, a degraded delta component may be promoted back to active if it has not become stale and its disk is healthy.

In some examples in which double delta components 214 and 215 are used, if one of the delta components (e.g., delta component 215) fails or otherwise becomes unavailable, the distributed data object 206 is configured to track when the delta component became unavailable and use the delta component (e.g., delta component 214) that is still available to record what the unavailable delta component misses. If/when the unavailable component becomes available again, the distributed data object 206 may be configured to synchronize, or resync, it from the other delta component to bring it up-to-date, such that the data redundancy benefits of the double delta components are restored.

FIG. 3 is a block diagram illustrating a system 300 configured with a redundant array of independent disks (RAID) (e.g., RAID layers 320, 322, and 324) for use with delta components (e.g., delta components 314 and 315) according to an embodiment. In some examples, the system 300 is implemented by a component or components of a system such as system 100 of FIG. 1 and/or system 200 of FIG. 2 (e.g., the distributed data object 206 may include the RAID system 300). It should be understood that the RAID layers 320 and 322 may include layers configured for mirroring (e.g., RAID 1) the associated components (e.g., mirroring the mirrored component 312 and the components associated with the RAID layer 324). Additionally, or alternatively, the RAID layers 320 and 322 may include layers configured for “striping” (e.g., RAID 0), such that the components associated with such a layer share data storage associated with incoming I/O traffic. For instance, if RAID layer 320 is configured as a RAID 0 layer, data stored may be split between the component 313 and the components associated with RAID layer 322. The RAID layers 320 and 322 may be configured to combine both types, such that RAID layer 320 is configured for striping and RAID layer 322 is configured for mirroring (e.g., RAID 01), or vice versa (e.g., RAID 10). Further, the RAID layers 320, 322, and/or 324 may be configured with other RAID features or functionality without departing from the description herein (e.g., error correction of a RAID 2 configuration or various parity features of RAID 3, 4, 5, and/or 6 configurations). Additionally, or alternatively, the RAID layers may be configured with erasure coding (e.g., RAID 5 or 6 configurations) without departing from the description. In some examples, double delta components as described herein are used in a RAID tree configuration, such that the delta components provide extra protection for the “leaf” of the original tree, and are unaware of the types of the nodes above them in the tree configuration. In most cases, delta components are configured as components that mirror the base component, such that delta components may be not usable in configurations where all data remains on a single component.

In order to enable the functionality of the delta component 314 as described herein, in some examples, the RAID layer 324 is configured for mirroring I/O traffic intended for the base component 310 between the base component 310 and the delta components 314-315. Thus, the configuration of the RAID layer 324 may be configured for mirroring independently from the overall arrangement of the RAID system 300. It should further be understood that, in other examples, the RAID system 300 may be organized in other arrangements and/or include more, fewer, or different RAID layers and associated components without departing from the spirit of the disclosure.

In some examples, the components “vote” when determining whether to commit or abort an I/O write to the associated distributed data object. The components vote to commit if they are in a state in which they can commit the I/O write. If the components as a group submit a threshold quantity of votes to commit the data (e.g., the threshold quantity may be equal to the quantity of active components for the I/O range of the I/O write to be committed), the data is committed to the distributed data object and the associated components. Alternatively, if the components do not submit a threshold quantity of votes to commit (e.g., several of the components are in an unavailable or failed state), the I/O write command is aborted for the distributed data object. As a result of aborting the command, a notification or alert may be sent to the source of the I/O write. In some examples, the voting process is handled according to a two-phase commit (2PC) configuration. The delta components as described herein have the same vote weight in such a process to decide whether I/O should be committed or aborted. Further, the algorithm to handle 2PC I/O failure recovery on the delta component will be the same as that for the mirrored components under a RAID 1 or RAID erasure coding (EC) configuration. All relevant active delta components' votes are counted when calculating the “needed count” and “actual count” for an inflight I/O.

Further, it should be understood that, in configurations using RAID EC where conventional mirrored components of an object do not necessarily have the exact same data stored due to such a configuration, the use of the delta components to synchronize with the base component as described herein is a substantial improvement over synchronizing with the other mirrored components, as synchronizing with the other mirrored components requires a reconstruction of data from each component to obtain the data needed to write to the synchronizing base component.

FIG. 4A is a block diagram 400A illustrating the placement of a single delta component 414, or “exclusive” delta component, on a fault domain (e.g., a fault domain of fault domains 442, 444, 446, 448, and 450) of a system according to an embodiment. Further, FIG. 4B is a block diagram 400B illustrating the placement of two delta components 414 and 415 on two fault domains 456 and 458 of a system according to an embodiment. In some examples, if a single delta component 414 cannot be placed as described with respect to diagram 400A, the two delta components 414 and 415 (e.g., double delta components or otherwise “nonexclusive” delta components) may be placed as described with respect to diagram 400B. It should be understood that the illustrated components of a system of diagrams 400A and 400B may be implemented as components of a system such as system 100 of FIG. 1 and/or system 200 of FIG. 2. For instance, the base component 410, the mirrored component 412 and the delta component 414 may be part of a distributed data object (e.g., distributed data object 206) that is distributed across a plurality of hardware host devices (e.g., multiple servers and/or racks of servers in a data center).

In some examples, the fault domains 442-450 of 400A and the fault domains 456-458 of 400B are divisions of the system that represent components being disposed on different physical host devices, such that the availability of the distributed data object is protected against failure of one or more host devices of the plurality of host devices, increasing data durability. For instance, the base component 410 and the mirrored components 412 are located in fault domain 442 and 444 respectively, indicating that the base component 410 is installed on a host device or devices associated with the fault domain 442 and the mirrored component 412 is installed on a different host device or devices associated with the fault domain 444, such that, in the event of a hardware failure or other type of failure (e.g., network failures) of the hosts of fault domain 442, the availability of the data on the distributed data object would be mirrored on the different hosts of the fault domain 444.

In addition to the fault domains 442 and 444 including the base component 410 and the mirrored component 412, the system further includes a fault domain 446 that includes a witness component 452, a fault domain 448 that includes an unrelated data component 454, and an unused fault domain 450 as illustrated in diagram 400A and fault domains 456 and 458 that include sibling data components 460 and 462 in diagram 400B. It should be understood that, in other examples, the system illustrated in 400A and 400B may include more, fewer, or different fault domains including differently arranged components without departing from the spirit of the disclosure.

In some examples, when the base component 410 has an upcoming downtime (e.g., for host maintenance) and the delta component 414 is created as a single delta component to act as a temporary mirror component as described herein with respect to diagram 400A, the delta component 414 must be placed on one of the fault domains of the system. The system may be configured to prioritize certain types of fault domains over others, such that the delta component 414 is placed in a fault domain based on the current arrangement of fault domains in such a way that the fault domain placement provides substantial protection against loss of data availability while also efficiently using fault domain resources (e.g., to enable flexibility of resource usage in the future, such as for rebalancing a mirror to a disk group that has more free space).

Because the delta component 414 is complementary to the base component 410 and the downtime of the base component 410 is often caused by host maintenance downtime, the delta component 414 (and the delta component 415 when they are created as double delta components as described with respect to diagram 400B) cannot be placed on the same fault domain (e.g., fault domain 442) as the base component 410. If it were placed on fault domain 442, the delta component 414 would become unavailable along with the base component 410 during host maintenance, invalidating the purpose of the delta component 414. Further, the delta component 414 and the delta component 415 are configured to provide additional security against loss of data availability of the distributed data object during the downtime of the base component 410, so any fault domain (e.g., fault domain 444) that already includes mirrored component (e.g., mirrored component 412) of the base component 410 should also be avoided. For instance, if the delta component 414 is placed on the fault domain 444 with the mirrored component 412, failure of the fault domain 444 could potentially cause both components 412 and 414 and associated data durability and availability to be lost.

The system illustrated in diagrams 400A and 400B may identify a fault domain on which to place the delta component 414 as a single delta component from a set of possible fault domains that does not include the fault domain of the base component 410 or a fault domain that includes mirrored components 412 of the base component 410. The set of possible fault domains includes fault domains that include witness components (e.g., witness component 452) of the distributed data object (e.g., fault domain 446), fault domains that include unrelated data components 454 (e.g., fault domain 448), or unused, or free, fault domains (e.g., fault domains 450). In some examples, the fault domain 446 containing the witness component 452 of the data object is prioritized first, then the fault domain 448 with the unrelated data components is prioritized, and lastly, the unused fault domain 450 is chosen. Further, in examples where the system is configured to include double delta components as described with respect to diagram 400B, the use of the double delta components may be prioritized after the single delta component fault domains as described with respect to diagram 400A. Alternatively, or additionally, the use of double delta components may be prioritized in a different order with respect to other single delta component fault domain usage (e.g., double delta components may be prioritized over the use of an unused fault domain 450). In other examples, more, fewer, or different prioritizations of fault domains for use with single delta components and/or with double delta components may be used without departing from the description herein.

The fault domain 446 is chosen if available because the witness component of a distributed data object is already placed on a fault domain that is separate from components of the object. Further, the I/O workload of the distributed data object may be made more balanced by placing the delta component 414 with the witness component 452, because the witness component 452 tends to have much less I/O traffic.

In some examples, witness components (e.g., witness component 452) are part of a distributed data object that contains metadata and serve as tiebreakers whenever availability decisions must be made to avoid split-brain behavior and satisfy quorum requirements. Witness components may be defined and deployed in at least three different ways: primary witness, secondary witness, and tiebreaker witness. A distributed data object may be configured to have a FTT value indicating a quantity of failures that the object is able to tolerate without losing data availability. Primary witnesses need at least (2*FTT)+1 nodes (e.g., fault domains) in a cluster to be able to tolerate FTT number of node/disk failures. If after placing all the data components, the required number of nodes is not present in the configuration, primary witnesses are placed on exclusive nodes until there are (2*FTT)+1 nodes in the configuration. Additionally, or alternatively, secondary witnesses may be created to make sure that every node has equal voting power towards quorum. This is important because every node failure should affect the quorum equally. Secondary witnesses are added so that every node gets an equal number of components, this includes the nodes that only hold primary witnesses. The total count of data component+witnesses on each node are equalized in this step. Tiebreaker witnesses may be added if, after adding primary and secondary witnesses, the object has an even number of total components (data components+witness components) in the configuration. A tiebreaker witness is added to make the total component count an odd number in order to avoid ties during availability decisions. It should be understood that, while the system only includes a single witness component 452, in other examples, the system may include more, fewer, or different witness components without departing from the description herein. Further, the delta component 414 may be assigned for placement on a fault domain of a witness component of any type as described. Alternatively, the placement of the delta component 414 may be configured to favor primary witness components due to primary witness components always being placed on exclusive nodes of the system, ensuring that the delta component 414 is separate from other data components.

If the distributed data object does not include a witness component, the system prioritizes assigning the delta component 414 to a fault domain that includes one or more unrelated data components. In some examples, a data component is unrelated when it does not include an overlapping address space with the base component 410 and/or the delta component 414. Additionally, or alternatively, the unrelated data component 454 may be identified due to not including any overlapping address space of the data object with which the base component 410 is associated. Using this type of fault domain refrains from increasing the total number of used fault domains (fault domains are a limited resource and conserving them is preferred in some examples) and preserves the data availability and durability provided by the delta component 414 by avoiding overlapping address space with components that are already present.

If neither fault domains with witness components nor fault domains with unrelated data components are available for placing the delta component 414, the system prioritizes use of an unused, or free, fault domain. Using such a fault domain has the advantage of preserving the availability and durability provided by the delta component 414 but it does occupy an otherwise unused fault domain, which may negatively affect operations of the system in the future. If none of the three types of fault domains are available, the system may be configured to not create the delta component 414. Alternatively, the system may be configured to create and place the delta component 414 on any other fault domain available without departing from the description.

It should be understood that, while the description herein primarily describes the selection of a fault domain for placing a delta component, in other examples, the described process may be used to select fault domains for placing other types of components (e.g., other mirrored components) without departing from the description herein.

If none of the above single delta component options are available, the system may be configured to place double delta components 414 and 415 as described with respect to 400B. It should be understood that the use of double delta components (or larger quantities of delta components) may be prioritized before or after any of the single delta component options described herein and/or use of double delta components may replace any of the single delta component options without departing from the description.

Double delta components may be placed on fault domains (e.g., fault domains 456 and 458) that already contain sibling data components (e.g., sibling data components 460 and 462), which are part of the same data object as the base component 410 but are not full mirrors of the base component 410 and/or of each other. If the sibling components are each full mirrors, then delta components are not needed since the data object can tolerate the failure of one of the fault domains and still have an active full mirror. In some examples, the sibling data components maybe configured to form a full sibling mirror of the base component 410 when combined. For instance, in a RAID-EC or RAIDS(3+1) configuration where three components together make up a “sibling mirror” of a base component, to synchronize the base component, at least two of the three components must be active in addition to one delta component (a total of three components). In such examples, placing two delta components on separate fault domains ensure that failure of one of the fault domains can be tolerated and one delta component will survive such a failure. It is undesirable to place a single, or “exclusive”, delta component on a fault domain with a sibling data component because failure of such a fault domain would result in the loss of both the sibling data component and the single delta component, preventing the base component and the associated data object from recovering. However, placing multiple delta components, such as the double delta components 414 and 415, on multiple fault domains 456 and 458 that already contain sibling data components 460 and 462 may provide sufficient enhancement of the durability of the data of the data object, as failure of one of the two fault domains leaves the other fault domain with a sibling data component and delta component that can be used in recovery. In some examples, the only constraint on placing two or more nonexclusive delta components is that they cannot be placed such that they co-locate with each other or with the base component they are intended to protect.

For example, in a RAIDS object with a four-node cluster, two double delta components, or nonexclusive delta components, may be created to protect a base component when the first node, upon which the base component is located, goes into a maintenance mode. The two double delta components are placed on the second and third nodes respectively, and each of the second and third nodes includes a separate sibling component of the data object. A failure of the second node could take down the sibling component and delta component located thereon during the maintenance of the first node, which may cause the object to lose liveness. However, when the first node comes out of maintenance, the base component may be synchronized with the delta component on the third node. Once synchronized, the base component may be combined with the sibling components on the third and fourth nodes to restore liveness to the data object, despite the failure of the second node and the sibling component and delta component thereon.

In some examples, placing multiple delta components is more expensive than placing a single delta component because it increases the amount of replication that must occur during the lives of the delta components, including an increase of the I/O used and the storage space used by the delta components. If a single delta component cannot be placed as described above with respect to diagram 400A and the maintenance associated with the fault domain 442 of the base component 410 would reduce the number of fault domain failures the system is capable of handling (e.g., the hardware fault tolerance (HFT) or the FTT) to zero, then the double delta components (or more delta components) may be generated and placed with sibling data components as described herein. In such examples, if the HFT level of the system remains above zero after factoring in the base component fault domain 442 being unavailable for maintenance, then no delta components may be generated instead, as the HFT level of one or more may be considered sufficient. Loss of fault domains (e.g., due to maintenance modes or other reasons) may be tracked by the system, such that the tracked value may be used by the system when determining whether to create a single delta component, double delta components, or no delta components. For instance, in a RAID6 object with an HFT level of two, no delta component may be generated based on a first maintenance process of a node, but at least one delta component may be placed based on a second maintenance process of another node that occurs during the first maintenance process. Alternatively, or additionally, if the system requires a higher fault tolerance value, more than two delta components may be required to maintain sufficient fault tolerance.

In some examples, double delta components 414 and 415 are configured to operate in substantially the same manner as single delta components in that they are configured to track I/O write commands that are intended for the base component 410 while the base component 410 is unavailable. Further, in the event of failure of one double delta component, the failed double delta component may be cleaned up but the other double delta component may remain active and continue to behave as a delta component until it is also removed. Additionally, or alternatively, as a result of a point-fix or other operations generally, the entire delta subtree may be replaced such that both double delta components are removed.

In further examples, rebalancing or other similar processes being performed on a data object that includes double delta components or another quantity of nonexclusive delta components are required to use the same placement logic as described herein when rebalancing or otherwise moving a delta component (e.g., ensuring that a delta component is not co-located with the base component or another associated delta component).

Additionally, or alternatively, it should be understood that the system of diagrams 400A and 400B may limit the creation of delta components based on resource usage. For instance, if the capacity or the component count of a data store are above 95% of the limits of the data store, no more delta components may be created until more of the resources of the data store become available again. Other limits may be placed on the creation of the delta components without departing from the description herein.

FIG. 5A is a sequence diagram illustrating a process 500A of generating delta components 214 and 215, decommissioning an associated component 210, and synchronizing the associated component 210 from one of the delta components 214 and 215 according to an embodiment. In some examples, the process 500A is performed by a component or components of a system such as system 200 of FIG. 2 as described herein. At 502, data write I/O is provided to the active base component 210 from the I/O interface 204. In some examples, the process 500 includes multiple data write I/O messages to the base component 210 prior to the process 500 proceeding to 504.

At 504, the base component 210 prepares to enter a decommissioned state or otherwise an unavailable state for maintenance. For instance, if a host device upon which the base component 210 is disposed is going to transition into a maintenance mode, the system schedules the base component 210 to enter a decommissioned or unavailable state during the maintenance of the host device. Additionally, or alternatively, the base component 210 may prepare to enter the unavailable state for other reasons without departing from the description.

As part of preparing to enter the unavailable state, delta components 214 and 215 are generated by or in association with the base component 210 at 506. In some examples, generating the delta components 214 and 215 include generating tracking bitmaps with which the delta components 214 and 215 are configured to track changes to the data address space due to data write I/O during the downtime of the base component. Further, the generation of the delta component may include identifying a fault domain and placing the delta component on the identified fault domain as described herein. The delta components 214 and 215 are configured to comprise unwritten data blocks and to mirror changes targeted at the base component 210 after their generation.

For instance, at 508, prior to the base component 210 becoming decommissioned or unavailable but after the generation of the delta component 214, new data write I/O is provided to the base component 210. Because the delta components 214 and 215 are configured to mirror the base component 210 (e.g., via a RAID arrangement configured for mirroring), the data write I/O at 508 is also provided to the delta components 214 and 215. When the delta components 214 and 215 receive data write I/O, they track the changes made by the I/O using tracking bitmaps as described herein, so the data write I/O at 508 may be tracked in the tracking bitmaps of the delta components 214 and 215, respectively, even though the base component 210 also receives the I/O prior to becoming unavailable.

At 510, the base component 210 enters an unavailable state (e.g., a decommissioned state based on an associated host device going into a maintenance mode). While the base component 210 is unavailable, data write I/O is sent from the I/O interface 204. Because the base component 210 is unavailable, it does not receive the data write I/O, but the delta components 214 and 215 do receive the data write I/O. Changes made to the address space are tracked in the tracking bitmaps of the delta components 214 and 215. In some examples, multiple data write I/Os may be provided via the I/O interface 204 and received by the delta components 214 and 215 while the base component 210 is unavailable, as described herein.

At 514, the base component 210 enters an available state. In some examples, the host device of the base component 210 comes back online from a maintenance mode, enabling the base component 210 to become available and begin receiving data write I/Os and storing data based thereon. Because some data write I/O has been received that was intended for the base component 210 while the base component 210 was unavailable, the base component 210 is considered “stale”. As a result, it must be synchronized with an active mirror, which includes the delta components 214 and 215 in this case. In other examples, other mirrored components may also be available as synchronization sources for the base component 210, as described herein.

At 516, the delta component 214 synchronizes, or resyncs, with the base component 210 to bring the base component 210 up to date. In some examples, the synchronization process includes identifying data blocks with changes that have been tracked by the delta component 214 and copying changes to those data blocks to the equivalent data blocks of the base component 210 as described herein. Additionally, the delta component 214 may be chosen to synchronize with the base component 210 instead of delta component 215 based on a defined priority, order, or other organization reason without departing from the description herein. For instance, the delta component 214 may be prioritized based on a connection between the base component 210 and the delta component 214 being stronger, faster, or closer from a network distance perspective than a connection between the base component 210 and the delta component 215. Alternatively, or additionally, delta component 214 may be chosen over delta component 215 for synchronization by virtue of delta component 214 being first in a list or other organization of the available delta components (e.g., the base component 210 and/or associated system records identifiers of the delta components and delta component 214 is recorded first, before delta component 215). In other examples, delta component 214 may be chosen over delta component 215 for synchronization for other reasons without departing from the description (e.g., a delta component may be chosen based on it being on a disk which is currently less heavily loaded than disks of other delta components, two delta components may be associated with different kinds or qualities of disks and one of the delta components may be prioritized based on those differences).

FIG. 5B is a sequence diagram illustrating a process 500B of generating delta components 214 and 215, decommissioning an associated component 210, and synchronizing the associated base component 210 from one of the delta components 215 based on another delta component 214 being unavailable according to an embodiment. In some examples, the process 500B is performed by a component or components of a system such as system 200 of FIG. 2 as described herein. Further, the process 500B may be preceded by 502-506 of process 500A of FIG. 5A as described above. Additionally, 508, 510, and 512 may be performed as described above with respect to process 500 A of FIG. 5A.

During the writing of I/O to the delta components 214 and 215 during a time period when the base component 210 is unavailable, the delta component 214 becomes unavailable at 518. In some examples, the delta component 214 becomes unavailable as a result of a failure of the fault domain upon which the delta component 214 is stored. Alternatively, or additionally, the delta component 214 may become unavailable for other reasons without departing from the description herein.

At 514, the base component 210 enters an available state. It should be understood that the base component 210 may enter the available state in substantially the same manner as described above with respect to process 500A of FIG. 5A. As a result of entering the available state, a resync or synchronization is initiated with the delta component 215 based on the determining that the delta component 214 is unavailable.

At 520, the delta component 215 synchronizes, or resyncs, with the base component 210 to bring the base component 210 up to date. In some examples, the synchronization process includes identifying data blocks with changes that have been tracked by the delta component 215 and copying changes to those data blocks to the equivalent data blocks of the base component 210 as described herein.

FIG. 5C is a sequence diagram illustrating a process 500C of generating delta components 214 and 215, decommissioning an associated component 210, and synchronizing the associated component 210 from two different delta components 214 and 215 according to an embodiment. In some examples, the process 500C is performed by a component or components of a system such as system 200 of FIG. 2 as described herein. Further, the process 500C may be preceded by 502-506 of process 500A of FIG. 5A as described above. Additionally, 508, 510, and 512 may be performed as described above with respect to process 500 A of FIG. 5A.

At 514, the base component 210 enters an available state. In some examples, the host device of the base component 210 comes back online from a maintenance mode, enabling the base component 210 to become available and begin receiving data write I/Os and storing data based thereon. Because some data write I/O has been received that was intended for the base component 210 while the base component 210 was unavailable, the base component 210 is considered “stale”. As a result, it must be synchronized with an active mirror, which includes the delta components 214 and 215 in this case. In other examples, other mirrored components may also be available as synchronization sources for the base component 210, as described herein.

At 522, the delta component 214 partially synchronizes, or resyncs, with the base component 210 to bring the base component 210 partially up to date. In some examples, the synchronization process includes identifying data blocks with changes that have been tracked by the delta component 214 and copying changes to those data blocks to the equivalent data blocks of the base component 210 as described herein. At 524, during the partial resync at 522, the resync process is interrupted by the delta component 214 unexpectedly entering an unavailable state. As described above, a delta component may enter an unavailable state based on a failure of an associated fault domain or for other reasons without departing from the description.

At 526, based on the resync only being partially completed, the base component 210 resumes the partial resync process using the delta component 215. At 528, the delta component 215 completes the resync process with the base component 210 such that the base component 210 is brought fully up to date. In some examples, the resuming and completing of the resync process includes identifying a subset of data of the delta component 215 that has not been synchronized with the base component 210 and resyncing that identified subset of data with the base component 210. For example, the base component 210 and/or associated resync process may track data blocks that have been synchronized from the delta component 214 previously and then synchronize only those data blocks that have not yet been synchronized based on the tracking bitmaps of the delta components. Alternatively, resuming and completing the resync process at 526 and 528 includes restarting the process from the beginning to fully synchronize the base component 210 with the delta component 215.

FIG. 6 is a flowchart illustrating a process 600 of generating delta components (e.g., delta components 214 and/or 215) associated with a base component (e.g., base component 210), selecting a fault domains (e.g., fault domains 446, 448, 450, 456, and/or 458), and placing the delta components on the selected fault domains according to an embodiment. In some examples, the process 600 is performed or otherwise implemented by a component or components of a system such as system 200 of FIG. 2. At 602, one or more delta components of the base component are generated. In some examples, the generation of the delta components are caused by the base component becoming unavailable and/or a notification that the base component will become unavailable soon (e.g., based on a host device of the base component going into a maintenance mode). The generation of the delta components includes selecting one or more fault domains on which to place the delta components. It should be understood that, in most examples, the fault domain of the base component is not selected as a target fault domain of the delta components in order to keep the components separate and preserve the data durability advantages provided, as described herein.

At 604, if a fault domain with no sibling components of the base component is available, the process proceeds to 606. Alternatively, if no fault domain lacking a sibling component is available, the process proceeds to 608. In some examples, the identified fault domain includes a witness component of the data object of the base component. In such cases, the fault domain with a witness component may be prioritized over other available fault domains. If multiple witness components are identified, a fault domain that is exclusively occupied by a primary witness component is prioritized for selection at 606. Alternatively, other types of fault domains, such as fault domains that are free or unused, or fault domains that only include unrelated data components are identified at 604, such that the process proceeds to 606.

At 606, when a fault domain without a sibling component is identified (e.g., a fault domain that includes a witness component), that identified fault domain is selected as the single delta target fault domain for a single delta component and the process proceeds to 614.

At 608, if two fault domains with sibling components of the base component are available, the process proceeds to 610. Alternatively, if two fault domains with sibling components are not identified or otherwise available, the process proceeds to 612.

At 610, when two fault domain with sibling components is identified, those identified fault domains are selected as the double delta target fault domains (e.g., first and second double delta fault domains) for two double delta components (e.g., first and second double delta components) and the process proceeds to 616.

At 612, the delta component process halts due to there being no available fault domains that meet the requirements for delta component placement (e.g., no single delta fault domains that are available and have no sibling components and no set of two double delta fault domains that are available and include sibling components). In such cases, the data object may continue operating without delta components as described herein.

At 614, a generated single delta component is placed on the single delta target fault domain. In some examples, after the delta component is placed and the generation process is complete, the delta component is configured to received mirrored write I/O targeted at the base component as described herein.

At 616, a first double delta component and a second double delta component are placed on a first double delta target fault domain and a second double delta target fault domain, respectively. In some examples, after the delta components are placed and the generation process is complete, the delta components are configured to receive mirrored write I/O targeted at the base component as described herein.

In some examples, if a fault domain that includes components of the distributed data object fails and the delta component is still available on the target fault domain, the delta component may be leveraged or otherwise used to recover from the failure.

Further, if either a fault domain with a witness component or a fault domain with unrelated components is used as the single delta target fault domain, unused fault domains are left available for use in expensive operations, such as use as transitional fault domains during configuration conversions of distributed data objects.

In examples where double delta components are used, if one of the double delta components becomes unavailable and misses one or more write I/Os during operation, the other double delta component may be used to synchronize with the unavailable double delta component to bring it up-to-date when it becomes available again.

Additionally, or alternatively, a method of placing delta components of a base component in target fault domains comprises: generating, by a processor, at least one delta component of the base component, the base component being included in a base fault domain, wherein generating includes: based on identifying a first fault domain of a plurality of fault domains that lacks a sibling component of the base component, selecting, by the processor, the first fault domain as a single delta target fault domain for a delta component; otherwise, based on identifying a second fault domain that includes a first sibling component of the base component and a third fault domain that includes a second sibling component of the base component, selecting, by the processor, the second fault domain and the third fault domain as a first double delta target fault domain and a second double delta target fault domain for delta components; and based on the first fault domain being selected as a single delta target fault domain, placing, by the processor, a single delta component on the single delta target fault domain; and otherwise, based on the second fault domain and the third fault domain being selected as the first double delta target fault domain and the second double delta target fault domain, placing, by the processor, a first double delta component on the first double delta target fault domain and a second double delta component on the second double delta target fault domain.

Additionally, or alternatively, a method of placing delta components of a base component in target fault domains comprises: generating, by a processor, at least one delta component of the base component, the base component being included in a base fault domain, wherein generating includes: when a first fault domain of a plurality of fault domains that lacks a sibling component of the base component is identified, selecting, by the processor, the first fault domain as a single delta target fault domain for a delta component; and when a second fault domain that includes a first sibling component of the base component is identified and a third fault domain that includes a second sibling component of the base component is identified, selecting, by the processor, the second fault domain and the third fault domain as a first double delta target fault domain and a second double delta target fault domain for delta components; and when the first fault domain is selected as a single delta target fault domain, placing, by the processor, a single delta component on the single delta target fault domain; and when the second fault domain and the third fault domain are selected as the first double delta target fault domain and the second double delta target fault domain, placing, by the processor, a first double delta component on the first double delta target fault domain and a second double delta component on the second double delta target fault domain.

Alternatively, or additionally, a method of placing delta components of a base component in target fault domains comprises: generating, by a processor, at least one delta component of the base component, the base component being included in a base fault domain, wherein generating includes: when a first fault domain of a plurality of fault domains that lacks a sibling component of the base component is identified: selecting, by the processor, the first fault domain as a single delta target fault domain for a delta component; and placing, by the processor, a single delta component on the single delta target fault domain; and when a second fault domain that includes a first sibling component of the base component is identified and a third fault domain that includes a second sibling component of the base component is identified: selecting, by the processor, the second fault domain and the third fault domain as a first double delta target fault domain and a second double delta target fault domain for delta components; and placing, by the processor, a first double delta component on the first double delta target fault domain and a second double delta component on the second double delta target fault domain.

Alternatively, or additionally, a method of placing delta components of a base component in target fault domains comprises: generating, by a processor, at least one delta component of the base component, the base component being included in a base fault domain, wherein generating includes: when a plurality of fault domains does not include a first fault domain that lacks a sibling component of the base component and a second fault domain that includes a first sibling component of the base component is identified and a third fault domain that includes a second sibling component of the base component is identified: selecting, by the processor, the second fault domain and the third fault domain as a first double delta target fault domain and a second double delta target fault domain for delta components; and placing, by the processor, a first double delta component on the first double delta target fault domain and a second double delta component on the second double delta target fault domain.

Additional Example Scenarios

Aspects of the disclosure enable various additional scenarios, such as next described.

In an example, a distributed data object includes a first data component and a second data component. The two components are configured to be mirrored, such that they both store the same data to enhance the data durability and data availability of the distributed data object. Further, the first component is placed in a first fault domain of an associated data storage system and the second component is placed in a second fault domain of the system.

During operation of the system, it is determined that a host device of the first fault domain, upon which the first component is located, needs to be switched to a maintenance mode and updated, during which the first component will become unavailable. Before the first component is transitioned to an unavailable state, the system generates delta components associated with the first component. The system determines that two double delta components should be generated. The delta components are configured to mirror I/O traffic to the first component after its generation. The delta components are generated with unwritten data blocks of the address space of the first component. Further, upon generation of the two double delta components, the system determines two separate fault domains upon which to place the delta components. The system does not identify a fault domain that includes a witness component of the distributed data object, but it does identify two separate fault domains that each include sibling components of the first data component. Those fault domains are selected as the double delta target fault domains for the double delta components and they are placed on those selected fault domains, separate from the first component, the second component, and each other.

After generation of the delta components is complete, the first component is transitioned to an unavailable state and the host device associated with the first component enters a maintenance mode for a period. During the period, each of the delta components receive I/O traffic targeted at the first component and record the associated data changes in unwritten data blocks. Further, the delta components indicate the data blocks that are changed in tracking bitmaps as described herein.

After the maintenance on the host device is complete, the first component becomes available again but is in a stale state due to having missed some I/O traffic while unavailable. The system identifies that the delta components are available and performs a synchronization process from the first double delta component to the first component (the first double delta component is selected due to being the first available delta component). The synchronization process includes identifying data blocks that have been changed by the I/O traffic using the tracking bitmap of the first double delta component to form a synchronization workload, filtering out the unwritten data locations of the data blocks in the synchronization workload, and copying the remaining data locations of the synchronization workload from the first double delta component to the first component. After the synchronization process is complete, the first component is up-to-date, and the delta components are marked for removal by a cleanup process of the system.

In a related example, during the downtime of the first component, the second component unexpectedly fails. Based on the detection of this failure, the system causes the delta components to begin second tracking bitmaps that track changes that occur from I/O traffic starting at the time the second component became unavailable.

After the first component is brought back up to date via the synchronization process, the second tracking bitmaps are provided to the first component before the delta components are removed, such that the first component is configured to continue tracking data changes that the second component has missed. When the second component is brought back online, the first component may be used, along with the tracking bitmaps received from the delta components, to synchronize with the second component and bring it up to date as well.

Exemplary Operating Environment

The present disclosure is operable with a computing apparatus according to an embodiment as a functional block diagram 700 in FIG. 7. In an embodiment, components of a computing apparatus 718 may be implemented as a part of an electronic device according to one or more embodiments described in this specification. The computing apparatus 718 comprises one or more processors 719 which may be microprocessors, controllers, or any other suitable type of processors for processing computer executable instructions to control the operation of the electronic device. Alternatively, or in addition, the processor 719 is any technology capable of executing logic or instructions, such as a hardcoded machine. Platform software comprising an operating system 720 or any other suitable platform software may be provided on the apparatus 718 to enable application software 721 to be executed on the device. According to an embodiment, generating delta components for base components and selecting target fault domains on which to place the generated delta components as described herein may be accomplished by software, hardware, and/or firmware.

Computer executable instructions may be provided using any computer-readable media that are accessible by the computing apparatus 718. Computer-readable media may include, for example, computer storage media such as a memory 722 and communications media. Computer storage media, such as a memory 722, include volatile and non-volatile, removable, and non-removable media implemented in any method or technology for storage of information such as computer readable instructions, data structures, program modules or the like. Computer storage media include, but are not limited to, RAM, ROM, EPROM, EEPROM, persistent memory, phase change memory, flash memory or other memory technology, CD-ROM, digital versatile disks (DVD) or other optical storage, magnetic cassettes, magnetic tape, magnetic disk storage, shingled disk storage or other magnetic storage devices, or any other non-transmission medium that can be used to store information for access by a computing apparatus. In contrast, communication media may embody computer readable instructions, data structures, program modules, or the like in a modulated data signal, such as a carrier wave, or other transport mechanism. As defined herein, computer storage media do not include communication media. Therefore, a computer storage medium should not be interpreted to be a propagating signal per se. Propagated signals per se are not examples of computer storage media. Although the computer storage medium (the memory 722) is shown within the computing apparatus 718, it will be appreciated by a person skilled in the art, that the storage may be distributed or located remotely and accessed via a network or other communication link (e.g. using a communication interface 723).

The computing apparatus 718 may comprise an input/output controller 724 configured to output information to one or more output devices 725, for example a display or a speaker, which may be separate from or integral to the electronic device. The input/output controller 724 may also be configured to receive and process an input from one or more input devices 726, for example, a keyboard, a microphone, or a touchpad. In one embodiment, the output device 725 may also act as the input device. An example of such a device may be a touch sensitive display. The input/output controller 724 may also output data to devices other than the output device, e.g. a locally connected printing device. In some embodiments, a user may provide input to the input device(s) 726 and/or receive output from the output device(s) 725.

The functionality described herein can be performed, at least in part, by one or more hardware logic components. According to an embodiment, the computing apparatus 718 is configured by the program code when executed by the processor 719 to execute the embodiments of the operations and functionality described. Alternatively, or in addition, the functionality described herein can be performed, at least in part, by one or more hardware logic components. For example, and without limitation, illustrative types of hardware logic components that can be used include Field-programmable Gate Arrays (FPGAs), Application-specific Integrated Circuits (ASICs), Program-specific Standard Products (ASSPs), System-on-a-chip systems (SOCs), Complex Programmable Logic Devices (CPLDs), Graphics Processing Units (GPUs).

At least a portion of the functionality of the various elements in the figures may be performed by other elements in the figures, or an entity (e.g., processor, web service, server, application program, computing device, etc.) not shown in the figures.

Although described in connection with an exemplary computing system environment, examples of the disclosure are capable of implementation with numerous other general purpose or special purpose computing system environments, configurations, or devices.

Examples of well-known computing systems, environments, and/or configurations that may be suitable for use with aspects of the disclosure include, but are not limited to, mobile or portable computing devices (e.g., smartphones), personal computers, server computers, hand-held (e.g., tablet) or laptop devices, multiprocessor systems, gaming consoles or controllers, microprocessor-based systems, set top boxes, programmable consumer electronics, mobile telephones, mobile computing and/or communication devices in wearable or accessory form factors (e.g., watches, glasses, headsets, or earphones), network PCs, minicomputers, mainframe computers, distributed computing environments that include any of the above systems or devices, and the like. In general, the disclosure is operable with any device with processing capability such that it can execute instructions such as those described herein. Such systems or devices may accept input from the user in any way, including from input devices such as a keyboard or pointing device, via gesture input, proximity input (such as by hovering), and/or via voice input.

Examples of the disclosure may be described in the general context of computer-executable instructions, such as program modules, executed by one or more computers or other devices in software, firmware, hardware, or a combination thereof. The computer-executable instructions may be organized into one or more computer-executable components or modules. Generally, program modules include, but are not limited to, routines, programs, objects, components, and data structures that perform particular tasks or implement particular abstract data types. Aspects of the disclosure may be implemented with any number and organization of such components or modules. For example, aspects of the disclosure are not limited to the specific computer-executable instructions or the specific components or modules illustrated in the figures and described herein. Other examples of the disclosure may include different computer-executable instructions or components having more or less functionality than illustrated and described herein.

In examples involving a general-purpose computer, aspects of the disclosure transform the general-purpose computer into a special-purpose computing device when configured to execute the instructions described herein.

An example computer system for placing delta components of a base component in target fault domains comprises: a processor; and a non-transitory computer readable medium having stored thereon program code for transferring data to another computer system, the program code causing the processor to: generate at least one delta component of the base component, the base component being included in a base fault domain, wherein generating includes: when a first fault domain of a plurality of fault domains that lacks a sibling component of the base component is identified: select the first fault domain as a single delta target fault domain for a delta component; and place a single delta component on the single delta target fault domain; and when a second fault domain that includes a first sibling component of the base component is identified and a third fault domain that includes a second sibling component of the base component is identified: select the second fault domain and the third fault domain as a first double delta target fault domain and a second double delta target fault domain for delta components; and place a first double delta component on the first double delta target fault domain and a second double delta component on the second double delta target fault domain.

An example method of placing delta components of a base component in target fault domains comprises: generating, by a processor, at least one delta component of the base component, the base component being included in a base fault domain, wherein generating includes: when a first fault domain of a plurality of fault domains that lacks a sibling component of the base component is identified: selecting, by the processor, the first fault domain as a single delta target fault domain for a delta component; and placing, by the processor, a single delta component on the single delta target fault domain; and when a second fault domain that includes a first sibling component of the base component is identified and a third fault domain that includes a second sibling component of the base component is identified: selecting, by the processor, the second fault domain and the third fault domain as a first double delta target fault domain and a second double delta target fault domain for delta components; and placing, by the processor, a first double delta component on the first double delta target fault domain and a second double delta component on the second double delta target fault domain.

An example non-transitory computer storage medium that has stored thereon program code that is executable by a first computer system at a first site and that embodies a method that comprises: generating at least one delta component of the base component, the base component being included in a base fault domain, wherein generating includes: when a first fault domain of a plurality of fault domains that lacks a sibling component of the base component is identified: selecting the first fault domain as a single delta target fault domain for a delta component; and placing a single delta component on the single delta target fault domain; and when a second fault domain that includes a first sibling component of the base component is identified and a third fault domain that includes a second sibling component of the base component is identified: selecting the second fault domain and the third fault domain as a first double delta target fault domain and a second double delta target fault domain for delta components; and placing a first double delta component on the first double delta target fault domain and a second double delta component on the second double delta target fault domain.

Alternatively, or in addition to the other examples described herein, examples include any combination of the following:

-   -   wherein generating the at least one delta component is based on         detecting the base component becoming unavailable on a fourth         fault domain of the plurality of fault domains.     -   wherein detecting the base component becoming unavailable on the         fourth fault domain further includes detecting that a host         device associated with the fourth fault domain is entering a         maintenance mode.     -   further comprising: based on the first double delta component         being placed on the first double delta target fault domain and         the second double delta component being placed on the second         double delta target fault domain, routing, by the processor, a         write operation targeted for the base component to the first         double delta component and the second double delta component;         and based on detecting the base component becoming available,         synchronizing, based on the routed write operation, the base         component with at least one of the following: the first double         delta component and the second double delta component.     -   further comprising: detecting the first double delta component         becoming unavailable prior to routing the write operation         targeted for the base component to the second double delta         component; and based on detecting the first double delta         component becoming available after routing the write operation         targeted for the based component to the second double delta         component, synchronizing, based on the routed write operation,         the first double delta component with the second double delta         component.     -   wherein selecting the first fault domain as a single delta         target fault domain includes selecting the first fault domain         based on at least one of the following: the first fault domain         including a witness component associated with a distributed data         object with which the base component is associated, the first         fault domain including a data component that includes a         different address space than an address space of the base         component, and the first fault domain being unused.     -   wherein the base component is part of a redundant array of         independent disks (RAID); and wherein placing a first double         delta component on the first double delta target fault domain         and a second double delta component on the second double delta         target fault domain includes placing the first double delta         component and the second double delta component into a delta         RAID level configured to mirror write operations targeted at the         base component.

Any range or device value given herein may be extended or altered without losing the effect sought, as will be apparent to the skilled person.

While no personally identifiable information is tracked by aspects of the disclosure, examples have been described with reference to data monitored and/or collected from the users. In some examples, notice may be provided to the users of the collection of the data (e.g., via a dialog box or preference setting) and users are given the opportunity to give or deny consent for the monitoring and/or collection. The consent may take the form of opt-in consent or opt-out consent.

Although the subject matter has been described in language specific to structural features and/or methodological acts, it is to be understood that the subject matter defined in the appended claims is not necessarily limited to the specific features or acts described above. Rather, the specific features and acts described above are disclosed as example forms of implementing the claims.

It will be understood that the benefits and advantages described above may relate to one embodiment or may relate to several embodiments. The embodiments are not limited to those that solve any or all of the stated problems or those that have any or all of the stated benefits and advantages. It will further be understood that reference to ‘an’ item refers to one or more of those items.

The embodiments illustrated and described herein as well as embodiments not specifically described herein but with the scope of aspects of the claims constitute exemplary means for generating, by a processor, at least one delta component of the base component, the base component being included in a base fault domain, wherein generating includes: when a first fault domain of a plurality of fault domains that lacks a sibling component of the base component is identified: exemplary means for selecting, by the processor, the first fault domain as a single delta target fault domain for a delta component; and exemplary means for placing, by the processor, a single delta component on the single delta target fault domain; and when a second fault domain that includes a first sibling component of the base component is identified and a third fault domain that includes a second sibling component of the base component is identified: exemplary means for selecting, by the processor, the second fault domain and the third fault domain as a first double delta target fault domain and a second double delta target fault domain for delta components; and exemplary means for placing, by the processor, a first double delta component on the first double delta target fault domain and a second double delta component on the second double delta target fault domain.

The term “comprising” is used in this specification to mean including the feature(s) or act(s) followed thereafter, without excluding the presence of one or more additional features or acts.

In some examples, the operations illustrated in the figures may be implemented as software instructions encoded on a computer readable medium, in hardware programmed or designed to perform the operations, or both. For example, aspects of the disclosure may be implemented as a system on a chip or other circuitry including a plurality of interconnected, electrically conductive elements.

The order of execution or performance of the operations in examples of the disclosure illustrated and described herein is not essential, unless otherwise specified. That is, the operations may be performed in any order, unless otherwise specified, and examples of the disclosure may include additional or fewer operations than those disclosed herein. For example, it is contemplated that executing or performing a particular operation before, contemporaneously with, or after another operation is within the scope of aspects of the disclosure.

When introducing elements of aspects of the disclosure or the examples thereof, the articles “a,” “an,” “the,” and “said” are intended to mean that there are one or more of the elements. The terms “comprising,” “including,” and “having” are intended to be inclusive and mean that there may be additional elements other than the listed elements. The term “exemplary” is intended to mean “an example of.” The phrase “one or more of the following: A, B, and C” means “at least one of A and/or at least one of B and/or at least one of C.”

Having described aspects of the disclosure in detail, it will be apparent that modifications and variations are possible without departing from the scope of aspects of the disclosure as defined in the appended claims. As various changes could be made in the above constructions, products, and methods without departing from the scope of aspects of the disclosure, it is intended that all matter contained in the above description and shown in the accompanying drawings shall be interpreted as illustrative and not in a limiting sense. 

What is claimed is:
 1. A method of placing delta components of a base component in target fault domains, the method comprising: generating, by a processor, at least one delta component of the base component, the base component being included in a base fault domain; and placing the generated at least one delta component in at least one target fault domain, wherein placing comprises: when a first fault domain of a plurality of fault domains that lacks a sibling component of the base component is identified: selecting, by the processor, the first fault domain as a single delta target fault domain for a delta component; and placing, by the processor, a single delta component on the single delta target fault domain; and when a second fault domain that includes a first sibling component of the base component is identified and a third fault domain that includes a second sibling component of the base component is identified: selecting, by the processor, the second fault domain and the third fault domain as a first double delta target fault domain and a second double delta target fault domain for delta components; and placing, by the processor, a first double delta component on the first double delta target fault domain and a second double delta component on the second double delta target fault domain.
 2. The method of claim 1, wherein generating the at least one delta component is based on detecting the base component becoming unavailable on the base fault domain of the plurality of fault domains.
 3. The method of claim 2, wherein detecting the base component becoming unavailable on the base fault domain further includes detecting that a host device associated with the base fault domain is entering a maintenance mode.
 4. The method of claim 2, further comprising: based on the first double delta component being placed on the first double delta target fault domain and the second double delta component being placed on the second double delta target fault domain, routing, by the processor, a write operation targeted for the base component to the first double delta component and the second double delta component; and based on detecting the base component becoming available, synchronizing, based on the routed write operation, the base component with at least one of the following: the first double delta component and the second double delta component.
 5. The method of claim 4, further comprising: detecting the first double delta component becoming unavailable prior to routing the write operation targeted for the base component to the second double delta component; and based on detecting the first double delta component becoming available after routing the write operation targeted for the base component to the second double delta component, synchronizing, based on the routed write operation, the first double delta component with the second double delta component.
 6. The method of claim 1, wherein selecting the first fault domain as a single delta target fault domain includes selecting the first fault domain based on at least one of the following: the first fault domain including a witness component associated with a distributed data object with which the base component is associated, the first fault domain including a data component that includes a different address space than an address space of the base component, and the first fault domain being unused.
 7. The method of claim 1, wherein the base component is part of a redundant array of independent disks (RAID); and wherein placing a first double delta component on the first double delta target fault domain and a second double delta component on the second double delta target fault domain includes placing the first double delta component and the second double delta component into a delta RAID level configured to mirror write operations targeted at the base component.
 8. A computer system for placing delta components of a base component in target fault domains, the computer system comprising: a processor; and a non-transitory computer readable medium having stored thereon program code for transferring data to another computer system, the program code causing the processor to: generate at least one delta component of the base component, the base component being included in a base fault domain; and place the generated at least one delta component in at least one target fault domain, wherein placing includes: when a first fault domain of a plurality of fault domains that lacks a sibling component of the base component is identified: select the first fault domain as a single delta target fault domain for a delta component; and place a single delta component on the single delta target fault domain; and when a second fault domain that includes a first sibling component of the base component is identified and a third fault domain that includes a second sibling component of the base component is identified: select the second fault domain and the third fault domain as a first double delta target fault domain and a second double delta target fault domain for delta components; and place a first double delta component on the first double delta target fault domain and a second double delta component on the second double delta target fault domain.
 9. The computer system of claim 8, wherein generating the at least one delta component is based on detecting the base component becoming unavailable on the base fault domain of the plurality of fault domains.
 10. The computer system of claim 9, wherein detecting the base component becoming unavailable on the base fault domain further includes detecting that a host device associated with the base fault domain is entering a maintenance mode.
 11. The computer system of claim 9, wherein the program code is further operative to: based on the first double delta component being placed on the first double delta target fault domain and the second double delta component being placed on the second double delta target fault domain, route a write operation targeted for the base component to the first double delta component and the second double delta component; and based on detecting the base component becoming available, synchronize, based on the routed write operation, the base component with at least one of the following: the first double delta component and the second double delta component.
 12. The computer system of claim 11, wherein the program code is further operative to: detect the first double delta component becoming unavailable prior to routing the write operation targeted for the base component to the second double delta component; and based on detecting the first double delta component becoming available after routing the write operation targeted for the base component to the second double delta component, synchronize, based on the routed write operation, the first double delta component with the second double delta component.
 13. The computer system of claim 8, wherein selecting the first fault domain as a single delta target fault domain includes selecting the first fault domain based on at least one of the following: the first fault domain including a witness component associated with a distributed data object with which the base component is associated, the first fault domain including a data component that includes a different address space than an address space of the base component, and the first fault domain being unused.
 14. The computer system of claim 8, wherein the base component is part of a redundant array of independent disks (RAID); and wherein placing a first double delta component on the first double delta target fault domain and a second double delta component on the second double delta target fault domain includes placing the first double delta component and the second double delta component into a delta RAID level configured to mirror write operations targeted at the base component.
 15. A non-transitory computer storage medium having stored thereon program code executable by a first computer system at a first site, the program code embodying a method comprising: generating at least one delta component of a base component, the base component being included in a base fault domain; and placing the generated at least one delta component in at least one target fault domain, wherein placing includes: when a first fault domain of a plurality of fault domains that lacks a sibling component of the base component is identified: selecting the first fault domain as a single delta target fault domain for a delta component; and placing a single delta component on the single delta target fault domain; and when a second fault domain that includes a first sibling component of the base component is identified and a third fault domain that includes a second sibling component of the base component is identified: selecting the second fault domain and the third fault domain as a first double delta target fault domain and a second double delta target fault domain for delta components; and placing a first double delta component on the first double delta target fault domain and a second double delta component on the second double delta target fault domain.
 16. The non-transitory computer storage medium of claim 15, wherein generating the at least one delta component is based on detecting the base component becoming unavailable on the base fault domain of the plurality of fault domains.
 17. The non-transitory computer storage medium of claim 16, wherein detecting the base component becoming unavailable on the base fault domain further includes detecting that a host device associated with the base fault domain is entering a maintenance mode.
 18. The non-transitory computer storage medium of claim 16, wherein the program code further comprises: based on the first double delta component being placed on the first double delta target fault domain and the second double delta component being placed on the second double delta target fault domain, routing a write operation targeted for the base component to the first double delta component and the second double delta component; and based on detecting the base component becoming available, synchronizing, based on the routed write operation, the base component with at least one of the following: the first double delta component and the second double delta component.
 19. The non-transitory computer storage medium of claim 18, wherein the program code further comprises: detecting the first double delta component becoming unavailable prior to routing the write operation targeted for the base component to the second double delta component; and based on detecting the first double delta component becoming available after routing the write operation targeted for the base component to the second double delta component, synchronizing, based on the routed write operation, the first double delta component with the second double delta component.
 20. The non-transitory computer storage medium of claim 15, wherein selecting the first fault domain as a single delta target fault domain includes selecting the first fault domain based on at least one of the following: the first fault domain including a witness component associated with a distributed data object with which the base component is associated, the first fault domain including a data component that includes a different address space than an address space of the base component, and the first fault domain being unused. 